Interactive circuit laboratory 04

Full adder lab

Change A, B and carry-in to witness sum and carry-out.

What the simulator is showing you

A single full-adder stage must handle three one-bit inputs. The least significant result bit and carry-out are different outputs.

Try to predict the next output before changing the input. A prediction is evidence that you understand the mechanism. If the result surprises you, trace the bit values or the stored state explicitly.

Go deeper into the explanation

These experiments are simplified teaching models. The rules are intentional and inspectable, but they do not simulate transistor propagation delay, power consumption, or real processor pipeline details.